Authored WWW Tutorials as part of Glencoe/McGraw Hill Publishing Company's Educational Web Site, Basic Skills in Electricity and Electronics series 

"Circuit Integrity Series" 

Educational Web Site Design & Development, Danville, VA

Electronics Tutorials: >300 URLs in more than 90 related subject areas   Williamson-labs.com

Tutorials: NTSC Television  ntsc-tv.com

Field of expertise: Video, Television, CGI, Design and Technology, etc.   Citation 

Designer/Researcher  Virtual Reality Laboratory

Designed a video input adaptor card for UNC's & HP's 
"Pixel Flow" (PxFl) Massively-Parallel Supercomputer.

Faculty Member: Lecturer and Advisor to The Senior Design Center in the Electrical and Computer Engineering Department.  http://www3.ncsu.edu/ECE480/
3 1/2 years  > 600 student advisees 

This is a course that gives senior ECE students their first REAL WORLD design experience. 
Typically an industry sponsor has a real project they need done--hardware and/or software. They fund and sometimes assist (equip., work space, etc.) the students in solving their real world design problems. 

The "faculty to student" relationship in this course is much more intimate than is the general case; there is almost an apprenticeship/mentor relationship, which is much more productive in turning out an Engineer...

I gave weekly lectures--hands on demonstrations--of current and leading edge technologies. 

In addition to my role as advisor, I also acted as sponsor on some projects, through the auspices of my company.

I developed a Web Site replete with Tutorials to help remediate students' lack of fundamental understanding of Electronics, Electrical Engineering, etc. http://www3.ncsu.edu/ECE480/
 

I had a contact with USDOT/NHTSA to design, develop and deliver an automotive lane tracking system. This was a system that was to be part of NHTSA's DASCAR instrumented research vehicle.

The Lane Tracker used a 50-mW NIR laser with a Linear CCD Array camera to monitor the lateral position of a vehicle in traffic. The system furnished realtime positional data day or night in all types of weather conditions (sampled white line every 1/8 to 1/2 inch, at 60 MPH).

An application for the Lane Tracker is as a "run-off-road" detection and alerting system (virtual rumble strip) for large trucks, as well as, automobiles.
 

I am developing an automated, very-hi-res Multimedia image input system. This system consists of an inexpensive color CCD camera fitted to a proprietary active optical image displacement device, which yields a maximum real-time resolution enhancement of times 4 - in both X and Y (754 H, 480 V = 3016H, 1920V). camera and its adaptive "movie light," are interactively controlled, as well as, positionally automated by the host computer (presently 486 PC) via its GUI; thus eliminating the need to physically handle the camera or the lighting. The very hi-res Images can be displayed on monitors of various resolutions. This is made possible by the unique use of multiple XGA display adaptors, yielding 8 million colors at full resolution. To hold the line on costs, I am utilizing Fuzzy Logic in the automation and limited AI and Virtual Reality techniques in the graphical user interface (GUI). This approach is also NTSC compatible, which allows the transmission and storage of very hi-res images on NTSC media.

Tower Simulator: and developed the prototype system of an airport tower simulator for, FAA sponsored, training of tower operators. This simulator uses articulated model aircraft running varied - takeoff, landing and emergency - scenarios under computer control. Developed carrier current and infrared data links connecting the computer with the aircraft and its transporter. I also developed lighting, sound effects and a graphical computer interface (GUI) for the instructor/operator. Simulator Data Com Network; and developed a carrier current Data Communication Network. By using a combination of frequency multiplexing and polling, this network could communicate with - and control - up to 128 devices or stations, with zero contention. Because of the hostile environment of this application and the fact that the devices or stations were dumb: protection of the system's bi-directional data integrity was needed. This was accomplished by the use of parity, echo-data-compare and a special carrier-loss-detection data inhibit circuit - which held "last-data" in its dual ranked data buffers if the carrier was lost during transmission. the system was for a special purpose, I developed the custom data exchange protocol, which was similar in nature to existing standards. The system is simple: it sends the device address and the first data byte, which is acknowledged by the device: sending either an echoed version of that data for comparison, or it sends its status register values (including "data OK" flag). Then the next packet is sent - until all three transfers are complete. If there is an error - parity or echo-data-compare fails - the data is retransmitted until a satisfactory completion or when the watchdog timer runs out: in which case the system abandons that device and moves on to the next...

IBM, CPD, Token Ring LAN Gateway: 

I was contracted by IBM, RTP, NC, to designed a 16 Mb/s Token Ring, LAN Gateway: the IBM 3274 91-R. This gateway joined a 16/4 Mb/s token ring to V.24, V.35, X.25 and RS-232C, host interfaces. My approach was to integrated an existing 3274 gateway with a new Token Ring card. In this system, all of the communications adapters - including the token-ring adapter - were serviced by a proprietary 24-bit microprocessor, a memory management chip controlling 4 Mbytes of ECC protected ram and a file adapter (2.5 Mbyte floppy). The Token Ring circuit used an in-house proprietary VLSI chip with excellent jitter characteristics (unlike the competition). I was principally responsible for the electronic design, as well as, contributing to its overall architecture, board layout, mechanical design and EMC/RFI design and testing. In our FCC/GOP qualifications, this system had no measurable token ring spectra. Cost Reduced Version: the end of this project, I did a feasibility study of a cost reduced version of this gateway: during this study I designed and implemented an error correction code (ECC) generator that would be used to "fake-out" a memory management chip that was expecting 24-bit ECC coded data from what would ultimately be a 16-bit system memory. This device took 16-bit memory data and derived the correct 8-bit ECC code (on the fly), attaching it to that data; thus creating the complete error corrected 24-bit word. This code conversion device was implemented in three 15 nsec PLDs in a large 13 input XOR array. I used ABLE and National's PALASM to generate the connection data.

A&T, Bell Labs', Supercomputer: 

Consulted on AT&T's Pixel Machine PXM 900 Graphics Supercomputer for about one year. The PXM 900 is a parallel processor architecture using up to 64 32-bit DSP-32 processor chips and runs at about 820 MFLOPS. My contributions were the design and development of the programmable system clock PLL, external sync circuitry, very high-speed overlay circuit - for overlaying NTSC video with workstation graphics, and the integration of these and other circuits into the machine's overall system design. Genlock: the task was to sync the PXM 900's system clock and video from one of several external video sources: NTSC, PAL, Sun - color and black and white - workstation, CCIR-601 4:2:2 & 4:4:4 and its own internal clock. The Sun workstation had a pixel rate of 107 MHz. For NTSC, dual PLLs were incorporated; one used HD, derived from a reliable sync separator, as reference, and the other used the NTSC subcarrier. Graphic/Image Overlay: RGB graphic/image overlay was controlled by the alpha channel memory data. Switching was accomplished in better than 1 nsec using Siliconx FET switches, configured in a SPDT configuration. The switching drivers utilized a special ECL logic circuit that compensated for the propagation delay, resulting in no observable flaws when displayed on a, high quality, 1280 line monitor.

IBM, CPD, Desktop Multimedia Research: 

Three and a half years of consulting for IBM, Display Systems Department, RTP, NC: As part of some early PC based Desktop Multimedia research, I designed several video frame buffers for hi-res color camera-capture, and their PC AT Interfaces. Frame Buffers: frame buffers were programmable under CPU control and their interfaces conformed to the IBM XT and AT bus standard - including the card address. The frame buffers could transfer video data using either DMA or MMIO addressing. I also designed several other PC interfaces for some specialized peripherals, including a computer controlled color TV camera. Smart Camera: designed a camera system where the host computer - that is capturing and storing the camera's images - analyzes those images, and then directly controls the camera's parameters (setup, gain, lens focus, zoom, etc.); thus optimizing the image. This type of arrangement would allow for a large cost reduction in the OEM cameras used in such a system, and makes for an improved image (over the camera alone) under varying lighting conditions. Hi-Res Color Wheel Camera: designed a proprietary hi-res color TV camera which had double the resolution of conventional NTSC color TV cameras - 650 TV lines. The camera used a black and white CCD array with a RGB color-wheel, rotating at frame rate, between it and the lens. This was followed by a specially designed frame buffer that stored each sequential RGB image while continuously refreshing the display. Several variations on this theme yielded higher efficiency (less light attenuation): magenta, yellow and cyan, and YUV (clear, yellow and cyan) which could directly drive today's S-VHS color monitor/receivers. VGA on CGA Monitor: a method for displaying analog RGB (VGA) images on the ubiquitous TTL CGA color monitors. This was accomplished by converting each analog component color into a Pulse Width Modulated signal. This technique is akin to velocity modulation.

I designed a Video Digital Signal Processor (DSP) board for real-time image processing of 10-bit video. The system used pipe-line architecture, and was controlled by microcode residing in the fast Writable Control Store (WCS). The system's downloadable instruction set consisted of instructions 256-bits wide and two vertical fields deep. system could do Convolution (from 3 x 3 to 32 x 32 Kernel), Histogram, Correlation, Summation, AND, OR, XOR, etc.: on 10-bit digitized video, yielding a result having 16-bit resolution. The board, having a chip population in excess of 330 chips, consisted of a 35 nsec, 24-bit ALU; a 16 x 16, 50 nsec, multiplier; three 10-bit by 16-bit, nsec, Look-Up Tables (LUT); a 1K word (256-bit word) Writable Control Store (WCS) and was controlled by AMD's AM-2940 DMA controller. was responsible for the system architecture, I did the chip-level design, I did the board layout, the board de-bug and testing, and I wrote the code for the board's operation and testing. other products I either influenced or designed directly, were: a 24 bit RGB video digitizer, with individual remote offset and gain control; several 24 bit video display boards; a very high-speed video display board, capable 160 Mpixels/sec. I also designed a sync separator /PLL system clock, useful for stable overlay and genlock.

Design Engineer with Northern Telecom Inc., RTP, NC 

I was in the design and development group that took over, from BNR, the responsibility of new designs for the DMS-10 central office switch. I was responsible for the redesign of the Conference Calling Pack, Sync Clock Pack, and was responsible for baby-sitting design changes of the 2T19 Test Pack and a four party line pack. Transparent Network: a transparent network, whereby idle time slots, of any network, can be utilized: having the effect of increasing the capacity up to 20 percent. This would be accomplished by using the idle/busy bit in the connection memory to select any idle time slot on any of 32 network links. Reducing Idle Channel Noise: a method for synchronization of peripheral switching power supplies to a submultiple of the system clock, which had the effect of reducing system idle channel noise. This was caused by the "beat" between the harmonics of the 8-kHz sample clock and the unlocked PWM switching supply. Synchronization of the two would beat to zero or DC. Digital Phase Locked Loop: a proprietary digital phase locked loop for the synchronization of multiple DMS-10 offices. A PLL having the stability traceable to the reference source, was achieved by scanning a tapped delay line (delay ~ 1/F) that is passing the reference clock (at a rate determined by a rate-multiplier, which is clocked by a submultiple of the reference clock). was also involved in Network and Signaling redesign for the next generation DMS-10. a study into the feasibility of using DMS-100 peripheral packs in place of the DMS-10's peripheral packs.

Speech Bandwidth Compression: 
      Patent No. 3,510,597 

Designed and developed a Speech Bandwidth Compression System, under a private grant, resulting in a patent. The system reduces the bandwidth of a speech channel, by a factor of 2n. The principle behind the compression is to generate a SSB signal; infinitely limiting this signal, frequency divide (1/2, 1/4, 1/8, etc.) the extracted zero-axis-crossing information. This frequency scaled, infinitely limited, replica of the original SSB signal is difference mixed with the original unaltered SSB signal, yielding a SSB signal having a spectral distribution reduced by a factor of 2n over the original modulating voice input. Upon reception, this compressed SSB signal is, again, infinitely limited, extracting the zero-axis-crossing information which is frequency multiplied by the original compression factor. Then this multiplied result is sum mixed with the original unaltered compressed SSB signal input; yielding a SSB signal having a spectral distribution equal to the original modulating voice input. This compressed signal can be transmitted, by HF radio, L-carrier telephone radio link, etc. This system could also be used as a pre-processor for any digital encoder: resulting in a sizable bit rate reduction.

Communications System and Protective Suit Interphone for Battelle and the U.S. Army at Tooele, UT

I designed, built and delivered a communication system and protective suit Interphone to the U.S. Army's Chemical Weapons Disposal Plant in Tooele, Utah. The system consisted of three parts: the supervisor's key-set, wall phones with intercom and signaling and the chemical suit interphone. I completely redesigned a ten button ITT key-set to incorporate intercom and signaling requirements, while preserving the telephone quality, as well as, building an attaching network switching system. wall phones were converted from two-wire to four-wire sets while maintaining proper sidetone and voice levels. They, like the key-set, had intercom and signaling function. Suit Interphone: chemical suits consisted of an optically coupled interface through a clear plastic window in the suit. The coupling incorporated polarized optics and carrier-borne pulse-width-modulation, PWM. The wearer of the suit wore an oxygen mask with either a boom mic or a throat mic. Because of the noise caused by the inrush of air during breathing, various noise canceling techniques were tried with limited success. The wearer used large earmuff type earphones which incorporated adjustable sound level and controllable sidetone. On earlier suits, the wearer's biggest complaints were poor sidetone and improper audio level.

I was on the staff of the Electrical Engineering Department, North Carolina State University as a designer. I was hired to participate on Project Themis, a Department of Defense (DoD) sponsored research grant. Here I designed and developed various systems for use in, speech and video, bit-rate compression research. Among these were PCM, DPCM, ADPCM (Adaptive Differential Pulse Code Modulation), Delta Modulation and CVSD encoders/decoders for both television and telephony. As a member of the Project Themis team, I also lectured on various research topics to mostly graduate students and faculty. DPCM transcoder of my early projects was to designed a Delta-Modulation to DPCM transcoder. This was done by sampling n-bits of the serial delta-mod output, and using a look-up table for mapping the output. This scheme was devised by J.B. O'Neal while working on the "Picture Phone" project at Bell Labs.

DoD DPCM: 

Design of a DPCM Communication System for the Defense Communication Agency. The DCA needed 3 channels of 6-bit DPCM running at 153.6 kb/s (8 x 19.2). I used an ITT, T-124, T1 carrier system as a platform: using its power supply, line cards, signaling, PCM encoder/decoder, PAM multiplexor, etc. I converted the PCM encoder and decoder into a DPCM CODEC by adding a 2 tap predictor. A clock conversion PLL circuit was incorporated for both transmit and receive.

T-1 Carrier Compression:

I was a designer and group leader of a graduate research project concerned with 2:1 compression of a T1 span for the U.S.A.F. Rome Air Development Center. We were able, by the use of a combination of ADPCM, TASI (Time Assignment Speech Interpolation) and bit dropping, to send 48 T-1 channels down one T-1 span line. Both voice and data (56-kb/s) were communicated. used two ITT T-324 T-1 carrier units as our platform. Essentially, we synchronized the two T-324s, using a de-skew buffer an combiner, such that both T-1s could inter-leave their data to the Di-Bit Data Reduction (DDR) system. The DDR consisted of: an ADPCM encoder and decoder; a voice switch, with anti-vox; a channel assignment circuit for TASI; signaling extractor; ADPCM coefficient memory; multiplexor - which combines ADPCM output, data, signaling and channel assignment - and a T-1 compatible span line driver/receiver.

Bit-Slice Microprocessor:

Develop an AMD 2901 bit-slice processor based second generation T1 carrier ADPCM Compression System. The 2901 acted as a fast DSP or transcoder, taking either u-Law or a-Law PCM input and, in real-time, output several ADPCM voice channels - achieving two, three and four to one compression. Using AMD's System 29 development workstation, I designed a bit-slice based, ADPCM, T-1 carrier system, using AMD's 50 nsec 2901 bit-slice microprocessor. The system was a dedicated 16-bit processor with a custom instruction set and ran downloadable "embedded" code for the ADPCM algorithm. Bit-rate compressions of 2:1, 3:1 and 4:1 were accomplished with excellent results.

Ergonomic Research: 

Designed and built several experimental systems used in ergonomic research related to: "Information Processing Through Visual Perception as a Function of Signal-To-Noise Ratio, Bandwidth, Contrast and Type of Noise, on a Television Display." This was research into what effects various visual parameters have on acquisition of battlefield targets utilizing optical and closed circuit imaging devices.

Instrumented Automobile: 

Designed, developed and built a second generation instrumented automobile (NCSU Car) which included a lateral position tracking device - of my design - using a linear CCD array. [1] [2] This lateral tracking device could reliably detect the white line at the road's edge or the unmarked road edge. It worked in bad weather and at night. This automobile had a 9 track data recorder and sampler for recording - in real-time - various automobile parameters and driver responses. Things like steering wheel position, speed, brake pressure, oncoming headlight glare, G forces, lateral tracking relative to the center-line, etc. The data gathered was graphically displayed on a workstation in such a way that the driving session could be replayed. This coupled with video tape could be a useful tool in auto safety research. The original project was funded by N.C.D.O.T. who was looking for a method of automating driver's license testing. Skid Trailer: and built the instrumentation for an instrumented truck that N.C.D.O.T. used to measure highway surface skid resistance, otherwise known as the skid trailer. This consisted of a semi-automated data logging and control system.

Moving RADAR Calibration: 

Designed and developed a highly accurate speed measurement system that was used, in conjunction with the NCSU Car, for the certification of moving speed radar for North Carolina DMV.

I was in the new products design group where I participated in the design and development of UHF FM mobile radio equipment. One product was the "Porta-mobil 450" transceiver. This was a portable, hand-held, 15 Watt unit that could also be plugged in under an automobile dashboard. We were among the first to use helical resonators in the receiver front end. We also developed a UHF RF amplifier, using BJTs, that had outstanding intermodulation specs.

Zeus Antiballistic Missile, Kwajalein, Marshall Islands 

In the early sixties, I worked for Western Electric/Bell Labs on the Nike Zeus ABM project, in the Marshall Islands, Pacific Missile Range. Our task was to "shoot down" ICBMs launched from Vandenburg AFB, in California - some 5000 miles away. My job was calibration and maintenance: of the missile silo's closed-circuit surveillance cameras; the radios and navigation systems used in the camera aircraft, and most of the test equipment used on the island.

I was given the responsibility of designing and supervising a special test conducted for Bell Labs scientists who flew in from the Whippany Labs. The test was conducted on the 15 Megawatt (ZAR) Zeus Acquisition Radar's antenna, in the wake of an unexplained fire in the antenna--sabotage was suspected, but never proven.

  GE, Communications Products Dept., Lynchburg, VA 

Incoming Inspection Group
Authored Incoming Inspection test procedures.
Learned--once again--to PRETEST my Incoming Inspection test procedures.
Also learned to not underestimate the WOMEN doing the Incoming Inspection, i.e., their ability to do the job with MINIMAL instruction.

As a member of the US Air Force, I was a LINK Instrument Trainer Instructor. My job was to instruct SAC pilots in radio navigation, instrument flying and "recovery from unusual attitudes" procedures. This consisted of classroom and in-the-trainer instruction. My responsibilities were to design the lesson plans, instruction, testing, evaluation of pilot performance, recommend remedial training, etc. I was required to take the same yearly tests as the SAC pilots took: The SAC Pilot Exam., I evaluated B-52 pilots' performance in the trainer prior to their yearly check ride, resulting in a pass/fail outcome. Other responsibilities were the maintenance of the LINK Instrument Trainer's electronic and electromechanical systems: I both supervised and carried out maintenance.

Worked and saved for 4 years to fund Uranium prospecting trip to the Four Corners area (Utah, Colorado, New Mexico and Arizona), mainly Moab, Utah.

Unfortunately, most of the surface deposits had been discovered, leaving underground deposits requiring core drilling equipment and a knowledge of local geology.

Western Electric, NC, Telco Equipment Installer

Central Office/Communications Interface, Installation
USA F's SAGE Air Defense Filter Center, Fort Lee, VA

Mobile Radio Service & Installation (~17 years old, Post Punk era)
Independent Motorola Service Station: Installed & Serviced Police, Taxi, Power Utilities, Forest Service, Installations.

Disbursal of Parental Revenues
Family Motorcycle Rider
Miscreant/Black Sheep
Junior High School Dropout

I have designed and built electromyographic (EMG) telemetry system for remote monitoring of ambulatory patients with neuro-muscular pathology.

Designed and built a electro- narcosis device, used to anesthetize small animals undergoing delicate heart surgery. Designed and developed sound synthesizer used in duck imprinting experiments. ..

Designed and developed voice recognition/synthesizer device for use by patients with speaking or communication deficits. Their unique sounds or utterances would be converted into clear spoken words...

Designed and developed a stroboscopic device used in evoked-potential testing...

Designed a device to measure rate and volume of urination. It used disposable conical plastic cups that fit in the device, and used a balanced capacitive bridge to measure the flow-in of any conductive fluid. The output signal drove a strip recorder calibrated in milliliters per second...

Designed and developed a GSR meter with auto-zero. The device furnished delta and baseline information...

Designed a remote ALPHA rhythm detection and monitoring system...

Designed and built electrocardiac telemetry system for remote monitoring of ambulatory patients...

Designed an instrumented bed used to monitor sleeping patients' well-being, i.e., breathing rate, heart rate and general activity during sleep. This system is part of an AI based activity monitoring system for the elderly and/or infirm...

Designed a remote breathing monitor and recording system used in sleep apnea diagnostic testing.

Patents Granted: 
"Speech Bandwidth Compression and Expansion System"   Patent No. 3,510,597uspto

Patents Pending:
"Super Hi-Res Color Imaging Camera"
"Insitu Visible Light LAN for ITS" (IVHS)

Analog Devices, Inc., Greensboro, NC
AT&T, Bell Labs, Holmdel, NJ
Cain Encoder Company, Greenville, NC
Department of Energy, ORNL, Oak Ridge, TN
DOT/NHTSA, Washington, DC
Fish & Richardson P.C.,  Washington, DC
General Electric Co., Research Triangle Park, NC
IBM, CPD, Research Triangle Park, NC
IBM, Display Systems, Research Triangle Park, NC
Ikonas Graphics Systems Inc., Raleigh, NC
Industrial Engineering Dept., N.C.S.U, Raleigh, NC
Infotech, Miami, FL
N.C. Highway Safety Research Center, RTP, NC
N.C.D.O.T., Highway Research Dept., Raleigh, NC
N.I.H.E.S, Research Triangle Park, NC
North Carolina Mental Health Foundation, Raleigh, NC
Ohio State University, Graphics Research Foundation
R. Scott Associates, Raleigh, NC
Scientific Atlanta, San Diego, CA
Shankle Engineering, Raleigh, NC
Sun Microsystems, Inc., RTP, NC
Transcept Systems, Inc., Raleigh, NC
U.S. Army (Battele), CAMDS Project, Tooele, UT
U.S. Department of Agriculture, Raleigh, NC
University of Miami, Miami, FL